Are you interested in trialling a new technique that stops buffer overflows and other memory-safety issues — even in C or C++?

If you missed the in person event at Cambridge’s Bradfield Centre on March 15, you can catch up on the presentations and Q&A with presenters to find out about:

• Cambridge University’s new CHERI architecture: Capability Hardware Enhanced RISC Instructions.
• Why Arm partnered with University of Cambridge to develop prototype silicon.
• How you can use this prototype — the Arm Morello Board — to find bugs and memory safety issues in your existing code.
• How you can get hold of a Morello board plus £15,000 funding to trial the Morello prototype architecture in your organisation.